ETC1 Texture decoder.

I try to publish at least one post per week.

Now, post something REALLY interesting and valuable
each week is actually quite some work.

As I do not have so much time, I will publish about
something I have done some weeks ago...

It is about a hardware decoder for ETC1 texture compression
format.
The decoder work as the following :
- Input : Take a 64 bit data chunk with the compressed data.
- Input : adress of the pixel to decode in a 4x4 pixel block.
- Output : an RGB value, 888 bit format.
- Output : optionnally an overflow detector for ETC2 extension.

The decoder follow the description given by the original paper
that published this encoding format.

Here is also the CORRECT description of the 64 bit chunk
format as it was not described in the paper.

Finally here is the source code [TODO link] of the texture decoder in
VHDL language, it is quite small and could be usefull for a FPGA project.

One must note that the logic has no register, thus allowing to directly
perform the translation directly during the texture lookup transparently,
and avoid a "pre-decompression" stage during texture fetching.

I would really be glad to put my hand over a ETC2 software encoder.
If such, then I would write a VHDL ETC2 decoder and look at the difference
in term of cost and performance over a ETC1 decoder.

By the way, the ETC1 decoder has been FPGA proven, decoding
faithfully the "elina" picture given as a sample with the ETC1 encoder.

Enjoy !