Snes on FPGA.

I am working since a few weeks (7 weeks) on a Snes on FPGA.

For now I am focusing only on the graphic chip and the chip implementation reaches now around 6k lines of VHDL code and I started the debug a few days ago.

Let's see if I can start to have something consistent to publish within a few feeks from now.
(ie screenshot would be nice)

Cheers.